Mixed-Signal ASICs:
From design to good integrated circuits

Workshop on Affordable Design and Production of Mixed-Signal ASICs for Small and Medium Enterprises (SMEs)

 
16:00 - 16:45 Presentation [P. Salome]: "ESD Challenges for fabless companies"
 
Abstract: During this presentation, the different ESD targets will be reviewed and discussed. The new requirements as IEC testing at silicon level will be addressed. For getting an ESD robust silicon, these new challenges require to consider ESD at different step of the design flow. The constraints of such an integration will be presented.
 
Biography: Dr. Pascal SALOME received his degree in electrical engineering from the National Institute of Applied Sciences (INSA) of Lyon, France in 1994. He received his PhD degree in 1998 for his studies on physical phenomena in NMOS transistors submitted to Electrostatic Discharges. In 1998, he joined the R&D centre of STMicroelectronics to develop ESD protection structures for advanced sub-micron technologies. In 2000, he leaded the ESD/LU group for the IO-cell development. Since 2005, he has been working as program manager and consultant for SERMA technologies.
 

If we caught your interest, please REGISTER here.